|
|
|
Compact AES S-Boxes Initialization in Low Power Non-Volatile FPGAs
Milos Drutarovsky, Viktor Fischer, Lubos Gaspar, Nathalie Bochard
|
| |
| We present a new efficient method for implementation of the AES byte substitution function (S-box).
The method is optimized for the AES implementation in low-power non-volatile FPGAs featuring volatile embedded RAM blocks. The method uses internal algebraic relations among AES S-box table elements that is mapped into a pair of suitably configured linear feedback shift registers (LFSRs). LFSRs iteratively generate substitution tables into embedded FPGA RAMs during initialization phase. The proposed solution requires less space and is faster than the one implementing whole S-boxes in the logic area, and it is especially suited to a power-aware AES implementation. The results of AES cipher S-box implemented in new low-power Actel Igloo FPGA family device are presented. |
|
