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The program of the Workshop is updated as information comes
| SUNDAY June 23rd 2013 | |
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| before 18.00 | Arrival and registration of participants in Fréjus |
| 20.00 | Welcome aperitif |
| past 21.00 | Dinner |
| MONDAY June 24th 2013 | |
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| 9.00 - 10.30 | Session I: Side-Channel Attacks 1 Feng Lu, Giorgio DiNatale, Marie-Lise Flottes, Bruno Rouzeyre: A multi-level simulation tool for laser attacks Rajesh Velegalati, Jens-Peter Kaps: Towards a Flexible, Opensource BOard for Side-channel analysis (FOBOS) Taoufik Chouta, Jean-Luc Danger, Tarik Graba: Enhancement of Hill Climbing Attacks on Biometric Embedded System Using SCA |
| 11.00 - 12.30 | Session II: Side-Channel Attacks 2 Bruno Robisson, Ingrid Exurville, Jean-Yves Zie, Helene Le Bouder, Jean-Max Dutertre, Jacques Fournier, Jean-Baptiste Rigaud: The bad and the good of Physical functions Lubos Gaspar, Gaetan Leurent, Francois-Xavier Standaert: Hardware Implementation and Side-channel Analysis of LAPIN Shivam Bhasin: From Cryptography to Hardware: Analyzing and Protecting Embedded Xilinx BRAM for Cryptographic Applications |
| 12.45 - 14.15 | Lunch |
| 14.30 - 16.00 | Session III: INVITED TALK - Francois-Xavier Standaert: How to Certify the Leakage of a Chip? Viktor Fischer: Short presentation of Evariste II platform Amir Moradi, David Oswald, Christof Paar, Pawel Swierczynski: Security Analysis of the Bitstream Encryption Scheme of Altera FPGAs |
| 16.30 - 18.30 | Session IV: Implementations Marcin Rogawski, Ekawat Homsirikamol, Kris Gaj: An FPGA-based Accelerator for Tate Pairing over Prime Fields G. Richard Newell: Recent Advances in FPGA Design Security Reduce Insider Threats Francesco Regazzoni: High-Throughput Implementation of AES-Based Lightweight Authenticated Encryption - ALE Zouha Cherif: Evaluation of Delay PUFs on CMOS 65 nm Technology: ASIC vs FPGA |
| past 20.00 | Dinner |
| TUESDAY June 25th 2013 | |
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| 9.00 - 10.30 | Session V: Random Number Generators David Lubicz: Oscillator based TRNG with a certified entropy rate Markus Dichtl: On Ring Oscillator Based True Random Number Generators and Some of their Variants Milos Drutarovsky, Michal Varchola: Remotely Testable eDiViDe FPGA Setup of Soft CPU with Cryptographic TRNG Coprocessor Extension |
| 11.00 - 12.30 | Session VI: INVITED TALK - Vincent van der Leest: Viktor Fischer, Nele Mentens: COST Action IC1204, WG4: Mitigation and self-repairable FPGA architectures for counteracting fault attacks |
| 12.45 - 14.15 | Lunch |
| 14.30 - 16.00 | Session VII: Secure implementations Tania Richmond, Pierre-Louis Cayrel, Viktor Fisher, Pascal Veron: A Secure Implementation of a Goppa Decoder Shivam Bhasin, Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm: Masking With Codes Martha Johanna Sepulveda, Guy Gogniat, Marius Strum: 3D Security-Enhanced Communication Structure for 3D-MPSoCs Protection: Challenges and Opotunities |
| 16.30 - 18.30 | Session VIII: Hardware attacks Werner Schindler: When Should a Side-Channel Attack or a Fault Attack be Considered as Successful? Annelie Heuser, Sylvain Guilley, Olivier Rioul: Revealing the Secrets of Success Theoretical Efficiency of Side-Channel Distinguishers Miroslav Monok, Robert Lorencz: Implementation of DES cryptographic algorithm using NVIDIA GPU for a brute-force attack Filip Stepanek, Jiri Bucek, Martin Novotny: Differential Power Analysis under Constrained Budget: Low Cost Education of Hackers |
| past 20.00 | Dinner |
| WEDNESDAY June 26th 2013 | |
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| 8.00 - 9.00 | Breakfast |
| 10.00 - 12.00 | Visit of the region: walk in the sea-side hills |
| 12.00 - 14.00 | Lunch on the beach |
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