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| Invited talks on application of reconfigurable logic devices in cryptography | |
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| S. Berna Ors: | Side-channel analysis attacks on FPGA implementations of cryptographic algorithms |
| L. Batina: | Implementation issues for secure integrated circuits and FPGAs |
| J.-L. Beuchat: | Arithmetic operators for FPGA implementation of cryptographic algorithms |
| L. Bossuet: | Preventing piracy and reverse engineering of SRAM FPGAs Bitstream |
| V. Calrlier | Fairfield scheme based true random number generator in Altera FPGA |
| P. Davies | Experiences with soft loaded cryptography |
| M. Drutarovsky | Chaos-based true random number generators |
| V. Fischer | Secure TRNG based on the extraction of the tracking jitter |
| V. Fischer | New multilevel MixColumn and InvMixColumn decomposition and resource sharing |
| K. Gaj | FPGA and cryptography: Is marriage in the cards? |
| P. Kohlbrenner | A self-testing jitter-based RNG in a Xilinx FPGA |
| S. S. Kumar | ECC implementation using 8-bit processor instruction set extension on FPGA |
| K. Nemoga | Generalized S-boxes |
| S. Trimberger | Virtex Encrypted Bitstreams |
| T. Wollinger | High speed implementation of hyperelliptic curves on FPGA |
Updated frequently ...