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| Contact |
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The program of the Workshop is updated as information comes
| SUNDAY June 28th 2015 | |
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| before 18.00 | Arrival and registration of participants in Leuven |
| 19.00 | Aperitif + walking dinner |
| MONDAY June 29th 2015 | |
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| 8.00 - 9.00 | Breakfast |
| 9.00 - 9.45 | INVITED TALK: Ingrid Verbauwhede, KU Leuven, COSIC, Belgium |
| 9.45 - 10.45 | Session I: PUFs Jean-Luc Danger, Yves Mathieu, Thibault Porteboeuf: Architecture and Method to Generate Common PUF and TRNG Functions Filip Kodytek, Robert Lórencz, and Jirí Bucek: Properties of improved ROPUF for FPGA generating multiple output bits from each pair of ROs |
| 11.15 - 12.15 | Session II: PUBLIC-KEY ARCHITECTURES Vincent Migliore, Maria Méndez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat: Somewhat homomorphic encryption schemes: which candidates and which expectations to have with this type of encryption schemes? Gabriel Gallin, Arnaud Tisserand and Nicolas Veyrat-Charvillon: Experimental Comparison of Crypto-Processor Architectures for Elliptic and Hyper-Elliptic Curve Cryptography |
| 12.15 - 14.15 | Lunch |
| 14.15 - 15.00 | INVITED TALK: Lejla Batina, Radboud University Nijmegen, Netherlands: Game of metrics: How to evaluate SCA resistance at the design stage? |
| 15.00 - 16.00 | Session III: SPECIAL SESSION: TSUNAMY Mehdi Aichouch, Clément Devigne, Guy Gogniat, Maria Mendez: Applications security in manycore platform: from operating system to hypervisor |
| 16.30 - 18.00 | Session IV: DESIGN PROTECTION Ricardo Chaves, Hirak Kashyap: Secure partial dynamic reconfiguration of FPGAs Brice Colombier, Lilian Bossuet, David Hély: Reversible Denial-of-Service by Locking Gates Insertion for IP Cores Design Protection David El-baze, Jean-Baptiste Rigaud and Philippe Maurine: A low-cost EM glitch detector |
| 19.00 | Aperitif + dinner at the Faculty Club |
| TUESDAY June 30th 2015 | |
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| 8.00 - 9.00 | Breakfast |
| 9.00 - 9.45 | INVITED TALK: Miroslav Knezevic, NXP Leuven, Belgium Lightweight crypto and good practices for designing lightweight ciphers |
| 9.45 - 10.45 | Session V: SYMMETRIC-KEY ARCHITECTURES I Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Malik Umar Sharif, and Kris Gaj: Toward a Universal High-Speed Interface for Authenticated Ciphers Cuauhtemoc Mancillas-López and Lilian Bossuet: Pipeline Implementation of Three Authenticated Encryption Algorithms |
| 11.15 - 12.15 | Session VI: SYMMETRIC-KEY ARCHITECTURES II Ekawat Homsirikamol, Kris Gaj: C vs. VHDL: Comparing Performance of CAESAR Candidates Using High-Level Synthesis on Xilinx FPGAs Joao Carlos Resende, Shivam Bhasin, Francesco Regazzoni, Ricardo Chaves: One Core Fit All: Towards Merging block ciphers on FPGA |
| 12.15 - 14.15 | Lunch |
| 14.15 - 15.45 | Session VII: SIDE CHANNEL ATTACKS Eloi de Chérisey, Annelie Heuser, Sylvain Guilley and Olivier Rioul: On the Optimality of Mutual Information Analysis for Discrete Leakages Werner Schindler: Exponent Blinding and Scalar Blinding in the Context of Side-Channel Analysis Sylvain Guilley, Annelie Heuser, Olivier Rioul, and Francois-Xavier Standaert: Template Attacks, Optimal Distinguishers and the Perceived Information Metric |
| 16.15 - 17.45 | Session VIII: TRNGs David Lubicz: A general framework to model 1/f2 noise of TRNG Markus Dichtl, Pascale Böffgen: A Critical Look at Measurements of the Statistically Independent Components of Ring Oscillator Noise Vladimir Rozic, Bohan Yang and Ingrid Verbauwhede: High-throughput TRNGs on FPGAs |
| 20.00 | Dinner |
| WEDNESDAY July 1st 2015 | |
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| 8.00 - 9.00 | Breakfast |
| 10.00 - 13.00 | beer walk through Leuven and brewery visit with tasting and snacks |
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