Proposed talks

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Authors, titles and abstracts (updated frequently)

Gabriel Gallin, Arnaud Tisserand and Nicolas Veyrat-Charvillon, IRISA - Rennes, France	Experimental Comparison of Crypto-Processor Architectures for Elliptic and Hyper-Elliptic Curve Cryptography
Markus Dichtl, Pascale Böffgen, Siemens Corporate Technology, Germany	A Critical Look at Measurements of the Statistically Independent Components of Ring Oscillator Noise
Brice Colombier, Lilian Bossuet, David Hély, Lab. Hubert Curien, St-Etienne	Reversible Denial-of-Service by Locking Gates Insertion for IP Cores Design Protection
Eloi de Chérisey, Annelie Heuser, Sylvain Guilley and Olivier Rioul, Telecom ParisTech	On the Optimality of Mutual Information Analysis for Discrete Leakages
Cuauhtemoc Mancillas-López and Lilian Bossuet, Lab. Hubert Curien, St-Etienne	Pipeline Implementation of Three Authenticated Encryption Algorithms
Sylvain Guilley, Annelie Heuser, Olivier Rioul, and Francois-Xavier Standaert, Telecom ParisTech	Template Attacks, Optimal Distinguishers and the Perceived Information Metric
Franck Bucheron, Arnaud Tisserand and Louis Rilling, DGA / IRISA - Rennes, France	zTPM : A New Hardware Architecture for TPM in Embedded Virtualization
Werner Schindler, BSI, Bonn, Germany	Exponent Blinding and Scalar Blinding in the Context of Side-Channel Analysis
David Lubicz, DGA-MI, France	A general framework to model 1/f² noise of TRNG
David El-baze, Jean-Baptiste Rigaud and Philippe Maurine, EMSE, CEA, France	A low-cost EM glitch detector
Vincent Migliore, Maria Méndez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat, Lab-STICC, IRISA, France	Somewhat homomorphic encryption schemes: which candidates and which expectations to have with this type of encryption schemes?
Vladimir Rozic, Bohan Yang and Ingrid Verbauwhede, KU Leuven, Belgium	High-throughput TRNGs on FPGAs
Filip Kodýtek, Róbert Lórencz, and Jirí Bucek	Properties of improved ROPUF for FPGA generating multiple output bits from each pair of ROs
Mehdi Aichouch, Clément Devigne, Guy Gogniat, Maria Mendez, CEA, LIP6, Lab-STICC, France	Applications security in manycore platform: from operating system to hypervisor
Jean-Luc Danger, Yves Mathieu, Thibault Porteboeuf, Telecom ParisTech, Secure-IC	Architecture and Method to Generate Common PUF and TRNG Functions
Hirak Kashyap, Ricardo Chaves, INESC-ID, Portugal	Secure partial dynamic reconfiguration of FPGAs
Joao Carlos Resende, Shivam Bhasin, Francesco Regazzoni, Ricardo Chaves	One Core Fit All: Towards Merging block ciphers on FPGA
Ekawat Homsirikamol, Kris Gaj, George Mason University, USA	C vs. VHDL: Comparing Performance of CAESAR Candidates Using High-Level Synthesis on Xilinx and Altera FPGAs
Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Malik Umar Sharif, and Kris Gaj, George Mason University, USA	Toward a Universal High-Speed Interface for Authenticated Ciphers

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