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Proposed talks

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Authors, titles and abstracts

David Arroyo,
Spanish Research Council in Madrid
Cybersecurity through openness
Subhadeep Banik,
ALaRI - USI, Lugano, Switzerland
Compact Circuits for Efficient Mobius Transform
Piedad Brox,
Microelectronics Institute of Seville (CSIC), Spain
Hardware-assisted solutions to secure embedded systems on programmable logic devices
Rogelio Calvillo,
CINVESTAV-IPN, Mexico
Side-Channel Leakage: A Case Study of GIFT-COFB
Claude Carlet,
Universities of Paris 8, France and Bergen, Norway
Some problems on Boolean functions posed by side channel attacks
Raphael Comps,
MAYA-ZK, PRAGUE, CZ
On the Implementation Challenges of Multi-Scalar-Multiplication for SNARKs
Angel Custodio Espinar,
TECNOBIT - Oesia Group, Ciudad Real, Spain
Challenges in the design of Hardware Security Modules that protect high level classified information
to achieve a security certification with the highest security level
Eloise Delolme,
LabHC St-Etienne / DGA-MI, France
Locking phenomenon on ring oscillators used in True Random Number Generators
Markus Dichtl,
Germany
On True Random Number Generators Based on Chaotic Oscillations in General and Their Implementation on FPGAs in Particular
Anis Fellah-Touta,
LabHC St-Etienne / CNRS, France
Advanced method for power trace alignment in Remote Power Analysis over Heterogeneous SoCs
Loic France,
LIRMM, Univ Montpellier, France
Active Simulating cold boot attacks in the gem5 simulator
Kris Gaj,
George Mason University, USA
High-Speed Hardware Implementations of Post-Quantum Cryptography Digital Signature Schemes
Paul Grandamme,
LabHC St-Etienne / EMSE Gardanne, France
X-Ray Fault Injection on Power OFF devices
Vianney Lapotre,
ENSIBS / Lab-STICC, Univ. Bretagne Sud, France
When in-core DIFT faces fault injection attacks
Carlos Lara-Nino,
LabHC St-Etienne, Univ Lyon, France
Is information leakage spilling?
Matus Oleksak,
Czech Technical University in Prague, CZ
Is ASCON the best choice regarding the Side-channel Analysis?
Alberto Josue Ortiz,
CINVESTAV-IPN, Mexico
Lightweight security accelerators for RISCV
Olivier Rioul,
Telecom Paris, France
A Generic Information-Theoretic Framework for Evaluating the Side-Channel Security of Masked Implementations
Markku-Juhani O. Saarinen,
PQShield Ltd, Oxford, UK
RISC-V Vector Cryptography and Post-Quantum Cryptography Plans
Maciej Skorski,
University of Warsaw, Poland
Statistical inference for oscillator-based random number generators



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