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Selected talks

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Authors, titles and abstracts (updated frequently)

F. Lu, Lab. LIRMM, MontpellierA multi-level simulation tool for laser attacks
D. Lubicz, DGA-MI, BruzOscillator based TRNG with a certified entropy rate
Z. Cherif, TELECOM ParisTechEvaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA
T. Richmond, Lab. Hubert Curien, St-EtienneA secure implementation of a Goppa decoder
M. Sepulveda, Lab-STICC, Lorient3D security-enhanced communication structure for 3D-MPSoCs protection: challenges and oportunities
B. Robisson, CEA-Leti, GardanneThe bad and the good of physical functions
M. Dichtl, Siemens Corporate Technology, Germany On ring oscillator based True Random Number Generators and some of their variants
L. Gaspar, UCL, BelgiqueHardware implementation and side-channel analysis of LAPIN
S. Bhasin, TELECOM ParisTechFrom cryptography to hardware: analyzing and protecting embedded Xilinx BRAM for cryptographic applications
W. Schindler, BSI, GermanyWhen should a side-channel attack or a fault attack be considered as successful?
A. Heuser, TELECOM ParisTechRevealing the secrets of success. Theoretical efficiency of side-channel distinguishers
M. Drutarovsky, Technical University of Kosice, SlovakiaRemotely testable eDiViDe FPGA setup of soft CPU with cryptographic TRNG coprocessor extension
T. Chouta, TELECOM ParisTechEnhancement of hill climbing attacks on biometric embedded system using SCA
J.-P. Kaps, George Mason University, USATowards a Flexible, Opensource BOard for Side-channel analysis (FOBOS)
K. Gaj, George Mason University, USAAn FPGA-based Accelerator for Tate Pairing over Prime Fields
S. Guilley, TELECOM ParisTechMasking With Codes
R. Lorencz, Czech Technical University Prague, Czech RepublicImplementation of DES cryptographic algorithm using NVIDIA GPU for a brute-force attack
R. Newell, Microsemi Corp., USARecent advances in FPGA design security reduce insider threats
F. Regazzoni, ALaRI, SwitzerlandHigh-Throughput Implementation of AES-Based Lightweight Authenticated Encryption - ALE
M. Novotny, Czech Technical University Prague, Czech RepublicDifferential Power Analysis under Constrained Budget: Low Cost Education of Hackers
P. Swierczynski, Ruhr-University Bochum, GermanySecurity Analysis of the Bitstream Encryption Scheme of Altera FPGAs



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