back to the CryptArchi Home page

Presented talks

Authors, titles and slides of the talks in chronological order

INVITED TALK- Francois-Xavier Standaert How to Certify the Leakage of a Chip?
INVITED TALK- Vincent van der Leest Hardware Intrinsic SecurityTM (HIS), Taking PUFs to the Next Level
01- Feng Lu, Giorgio DiNatale, Marie-Lise Flottes, Bruno Rouzeyre A multi-level simulation tool for laser attacks
02- Rajesh Velegalati, Jens-Peter Kaps Towards a Flexible, Opensource BOard for Side-channel analysis (FOBOS)
03- Taoufik Chouta, Jean-Luc Danger, Tarik Graba Enhancement of Hill Climbing Attacks on Biometric Embedded System Using SCA
04- Bruno Robisson, Ingrid Exurville, Jean-Yves Zie, Helene Le Bouder, Jean-Max Dutertre, Jacques Fournier, Jean-Baptiste Rigaud The bad and the good of Physical functions
05- Lubos Gaspar, Gaetan Leurent, Francois-Xavier Standaert Hardware Implementation and Side-channel Analysis of LAPIN
06- Shivam Bhasin From Cryptography to Hardware: Analyzing and Protecting Embedded Xilinx BRAM for Cryptographic Applications
07- Viktor Fischer Evariste II: Modular Hardware System for Fair TRNG Benchmarking
08- Amir Moradi, David Oswald, Christof Paar, Pawel Swierczynski Security Analysis of the Bitstream Encryption Scheme of Altera FPGAs
09- Marcin Rogawski, Ekawat Homsirikamol, Kris Gaj An FPGA-based Accelerator for Tate Pairing over Prime Fields
10- Richard Newell Recent Advances in FPGA Design Security Reduce Insider Threats
11- Andrey Bogdanov, Mojdeh Mohajerani, Francesco Regazzoni High-Throughput Implementation of AES-Based Lightweight Authenticated Encryption - ALE
12- Zouha Cherif, Florent Lozac'h, Jean-Luc Danger, Lilian Bossuet, Yves Mathieu, Tarik Graba Evaluation of Delay PUFs on CMOS 65 nm Technology: ASIC vs FPGA
13- David Lubicz, Nathalie Bochard Oscillator based TRNG with a certified entropy rate
14- Markus Dichtl On Ring Oscillator Based True Random Number Generators and Some of their Variants
15- Milos Drutarovsky, Michal Varchola Remotely Testable eDiViDe FPGA Setup of Soft CPU with Cryptographic TRNG Coprocessor Extension
16- Tania Richmond, Pierre-Louis Cayrel, Viktor Fischer, Pascal Véron A Secure Implementation of a Goppa Decoder
17- Shivam Bhasin, Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm Masking With Codes
18- Martha Johanna Sepulveda, Guy Gogniat, Marius Strum 3D Security-Enhanced Communication Structure for 3D-MPSoCs Protection: Challenges and Opotunities
19- Werner Schindler When Should a Side-Channel Attack or a Fault Attack be Considered as Successful?
20- Annelie Heuser, Sylvain Guilley, Olivier Rioul Revealing the Secrets of Success Theoretical Efficiency of Side-Channel Distinguishers
21- Miroslav Monok, Robert Lorencz Implementation of DES cryptographic algorithm using NVIDIA GPU for a brute-force attack
22- Filip Stepanek, Jiri Bucek, Martin Novotny Differential Power Analysis under Constrained Budget: Low Cost Education of Hackers




  Logo LaHC Logo Pres Lyon Logo IT Logo MS Logo TSE Logo CNRS Logo UJM