| Brice Colombier, Lilian Bossuet, David Hély, Lab. Hubert Curien, St-Etienne | Key Reconciliation Protocols: an Alternative for Lightweight Authentication of Integrated Circuits |
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| Bertrand Cambou, John Gibbs, Northern Arizona University, Flagstaff, Arizona, USA | Firewall with Nano-Helix PUFs for Fiber-Optic Communication |
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| Bertrand Cambou, Fatemeh Afghah, Northern Arizona University, Flagstaff, Arizona, USA | Physically Unclonable Functions with multi-states and Machine Learning |
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| Marco Bucci, Raimondo Luzzi, Infineon Technologies AG | A fully-digital Chaos-based Random Bit Generator |
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| Ibrahima Diop et al., STMicroelectronics France | Horizontal Attacks in Practice |
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| Johanna Sepulveda et al., Technical University of Munich, Germany | NoC cover and side channels are real: And now? |
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| Sylvain Guilley et al., Télécom ParisTech | A Challenge Code for Maximizing the Entropy of PUF Responses |
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| Georgios Selimis et al., Intrinsic-ID, the Netherlands | Pufs: Anchors of Trust in Resource constrained environments |
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| Maria Mendez Real et al., Lab-STICC, Lorient | Dynamic Spatially Isolated Secure Zones for NoC-based Many-core Accelerators |
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| Muhammad Abdul Wahab et al., IETR, Rennes | A hardware coprocessor for Zynq-based Dynamic Information Flow Tracking |
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| David El-Baze et al., EMSE, Gardanne | An Embedded Digital Sensor Against EM and BB Fault Injection |
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| Sophie Dupuis et al., LIRMM, Montpellier | Preventing Hardware Trojan Insertion through Logic Masking |
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| Filip Kodytek et al., Czech Technical University, Prague | Multiple output bits ROPUF design for TRNG |
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| Vincent Migliore et al., Lab-STICC, Lorient | On realistic speedup and possible homomorphic operations of Somewhat Homomorphic Encryption Schemes in hardware. |
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| Eloi de Cherisey et al., Télécom ParisTech | Defining Perceived Information based on Shannon's Communication Theory |
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| Werner Schindler, BSI Bonn, Germany | Tailored RNGs for Low-Cost Devices |
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| Florent Lozarc'h et al., Télécom ParisTech | Some Results about the Aging Impact on Delay PUFs |
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| Kris Gaj et al., George Mason University, USA | Fair and Comprehensive Benchmarking of 29 Round 2 CAESAR Candidates in Hardware: Preliminary Results |
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| Ihsan Cicek, Mustafa Parlak, and Cetin Kaya Koc, University of California, Santa Barbara | Light-weight FPGA Implementation of FIPS140-2 Online Statistical Tests |
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| Jens-Peter Kaps et al., George Mason University, USA | A Scalable ECC Processor Implementation for High-Speed and Light-Weight |
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| Francesco Regazzoni et al., ALaRI - USI, Lugano | Physical Attacks Against Lattice Based Cryptography |
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| Nicolas Bruneau et al., STMicroelectronics, Rousset | Taylor Expansion of Maximum Likelihood Attacks, with Application to Masked and Shuffled Implementations. |
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| Fabien Majeric et al., GEMALTO, France | Reversing the field :a single channel for self combined attack(to defeat circuit complexity) |
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