Proposed talks

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Authors, titles and abstracts

Michal Andrzejczak, Military University of Technology Warsaw, Poland	An Improved Architecture of a Hardware Accelerator for Factoring Integers with Elliptic Curve Method
S. Buchovecká, R. Lórencz, J. Buček, F. Kodýtek, Czech Technical University, Prague	Secure authentication and communication for embedded systems using a PUF/TRNG combined circuit
Bertrand Cambou, Northern Arizona University, Flagstaff, Arizona, USA	Addressable PUF Generators for Database-free Password Management System
Brice Colombier, Pierre-Alain Moëllic, CEA, Gardanne, France	Security evaluation of countermeasures against physical attacks inserted at compilation time
J-Luc Danger, Risa Yashiro, Tarik Graba, Yves Mathieu, Kazuo Sakiyama, Sylvain Guilley, Télécom ParisTech, France	Mixed PUF-TRNG Circuit using Body Biasing in FD-SOI
Eloi de Chérisey, Sylvain Guilley, Olivier Rioul, Télécom ParisTech, France	Confusing Information
Cyrielle Feron, Vianney Lapotre, Loïc Lagadec, ENSTA Brest, Lab-STICC Lorient, France	Parameter Exploration for Homomorphic Encryption Schemes Analysis
Viktor Fischer, Oto Petura, Ugo Mureddu, Nathalie Bochard, Marek Laban, Lab. Hubert Curien, St-Etienne, France	HECTOR TRNG design approach and its demonstration
Kris Gaj, Ahmed Ferozpuri, Viet Dang, Duc Nguyen, Farnoud Farahmand, Jens-Peter Kaps, George Mason University, USA	Post-Quantum Cryptography in Reconfigurable Hardware: Challenges, Opportunities, and State-of-the-Art
William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Kris Gaj, and Jens-Peter Kaps, George Mason University, USA	Evaluation of DPA Protected Implementations of CAESAR Finalists ACORN and Ascon and other Candidates
Stanislav Jeřábek, Martin Novotný, Czech Technical University, Prague	Dummy rounds DPA countermeasure
Audrey Lucas, CNRS - IRISA - INRIA, Rennes, France	A Simulator for Evaluating the Leakage in Arithmetic Circuits.
Cuauhtemoc Mancillas-López, Mridul Nandi, Lab. Hubert Curien, St-Etienne, Indian Statistical Institute, India	Spongy-Gift: A New Lightweight Message Authentication Code
Alexandre Menu, Jean-Luc Danger, Jean-Max Dutertre, Elias Kharbouche, Olivier Potin, and Jean-Baptiste Rigaud, Mines St-Etienne, CEA-Tech, Institut Mines-Telecom, Gardanne, France	Targeting several unpipelined instructions with a single electromagnetic pulse on 8-bit microcontroller
Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Vianney Lapotre, Guy Gogniat, Lab-STICC Lorient, France	Cache-Based Side-Channel Intrusion Detection using Hardware Performance Counters
Nele Mentens, Edoardo Charbon, Francesco Regazzoni, KU Leuven, Belgium, EPFL, ALaRI, Switzerland	Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow
Tania Richmond, Benoit Gerard, Annelie Heuser and Axel Legay, Inria, IRISA, Rennes, France	Side-channel Information Leakage of the Syndrome Computation in Code-Based Cryptography
Alexander Schaub, J-Luc Danger, Sylvain Guilley, Olivier Rioul, Télécom ParisTech, France	Reliability and Entropy of Delay PUFs: A Theoretical Analysis
Maciej Skorski, IST Austria	Evaluating Min-Entropy of Random Bits by Markov Chains
Felipe Valencia, Francesco Regazzoni, ALaRI - USI, Lugano, Switzerland	Fault Attack Resistance of Post Quantum Algorithms

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