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Program of the workshop

The program of the Workshop is updated as information comes

WEDNESDAY June 15th 2011
18.00 - 21.00 Reception and Get-Together at Acora Hotel with Light Dinner


THURSDAY June 16th 2011
9.00 - 9.15
Viktor Fischer & Tim Güneysu
welcome speech
9.15 - 10.30 Session I:

Florian Devic, Lionel Tores, Benoit Badrignans:
Embedded OS for FPGA platform: a Hardware-to-Software Security Overviews

Vladimir Rozic, Yong Ki Lee, Junfeng Fan, Miroslav Knezevic, Dusko Karaklajic, Roel Maes, Lejla Batina, Ingrid Verbauwhede:
Low-power Elliptic Curve Crypto Processor in 130nm technology

Michal Varchola, Tim Güneysu, Oliver Mischke:
A Very Lightweight Reconfigurable Elliptic Curve Crypto-Processor
11.00 - 12.15 Session II:

Petr Stembera, Martin Novotny:
Breaking Hitag-2 with COPACOBANA

Jean Da Rolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre:
New side-channel attack against scan chains

Amir Moradi, Alessandro Barenghi, Timo Kasper, Christof Paar:
Read The Free Bitstream - Extracting Secrets from Protected Hardware
12.15 - 13.45 Lunch
13.45 - 15.00 Session III:

Richard Newell:
Measurement of FPGA ring oscillator noise, and analysis using the Allan Variance method

Abdelkarim Cherkaoui, Alain Aubert, Viktor Fischer, Laurent Fesquet:
Asynchronous Self-Timed Rings for Randomness Generation

Josef Hlavac, Simona Buchovecka, Robert Lorencz:
New results in generating true random numbers on simple microcontrollers
15.30 - 16.45 Session IV:

Bernhard Jungk:
Compact FPGA Implementations of Selected Round 3 SHA-3 Candidates

Shivam Bhasin, Jean-Luc Danger, Tarik Graba, Sylvain Guilley:
How to design BCDL Logic with the best Trade-off between Complexity and Robustness

Ralf Zimmermann, Tim Güneysu, Christof Paar:
High-Performance Integer Factoring with Reconfigurable Devices
17.00 - 18.30 Round trip to Botanical Garden
18.30 - 21.30 Dinner: BBQ at Bistro


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FRIDAY June 17th 2011
9.00 - 10.15 Session V:

Kris Gaj, Ekawat Homsirikamol, Marcin Rogawski:
Investigating Design Space of Five Final SHA-3 Candidates in High-Performance FPGAs

Julien Francq, Jean-Baptiste Rigaud:
Alternative FPGA Implementations of some SHA-3 Finalists

Jens-Peter Kaps:
Scalability of SHA-3 Finalists for Lightweight Implementations on FPGAs
10.45 - 12.00Session VI:

Nicolas Debande, Youssef Souissi, Maxime Nassar, Thanh-ha Le, Sylvain Guilley, Jean-Luc Danger:
Side Channel Analysis enhancement: A proposition for measurements resynchronisation

David Oswald, Timo Kasper, Stephen Markhoff, Christof Paar:
FPGA-based Implementation Attacks with GIAnT

Pierre Bayon, Lilian Bossuet, Alain Aubert:
Random Number Generation: a potential target of electromagnetic emanation analysis?
12.00 - 13.30 Lunch
13.30 - 14.45 Session VII:

Markus Dichtl:
Short Presentation of a New German Project for True Random Number Generation on FPGAs

Philippe N'Guyen: Secure-IC, Product presentation
Smart-SIC Analyzer: the advanced evaluation platform for cryptographic embedded systems

Moulay Aziz El Aabid, Sylvain Guilley, Jean-Luc Danger:
Exotic Leakage Models

Annelie Heuser, Michael Kasper, Werner Schindler, Marc Stöttinger:
Security Research Between Attack and Design
15.15 - 16.30 Session VIII:

Elif Bilge Kavun, Tolga Yalcin:
Ultra-Compact Reconfigurable NTRUEncrypt Public Key Cryptosystem Core

Lubos Gaspar, Viktor Fischer:
Secure extensions of FPGA soft core processors aimed at symmetric key cryptography

Pascal Cotret, Jeremie Crenne, Guy Gogniat, Jean-Philippe Diguet:
Protecting communications in bus-based MPSoCs using hardware firewalls
16.30 - 17.00 Discussions & closing remarks
17.00 - 18.30 Travel + Leisure Time
18.30 - 21.00 Full Dinner Bochum Downtown


SATURDAY June 18th 2011: social event
9.30 - 10.00 Bus Trip to Hattingen
10.00 - 11.00 Visit Ancient City of Hattingen
11.00 - 12.00 Bus Trip and Sightseeing at Henrichshutte
12.00 - 13.30 Lunch at Henrichshutte
13.30 - 14.00 Bus back to Bochum

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