List of invited talks on applications of reconfigurable logic devices in cryptography
B. Badrignans, R. Elbaz, L. Torres:

Confidentiality and Integrity of FPGA Bitstreams

J. Bucek, R. Lórencz, T. Rosa:

Security of RFID in Practice

D. Champagne, R. Elbaz, R. B. Lee:

Application Memory Authentication

J.-L. Danger, S. Guilley, L. Sauvage, T. Graba, Y. Mathieu:

Implementation and Evaluation of WDDL Countermeasures in FPGAs

J. Di-Battista, M. Hlavac, J.-Ch. Courrege, J. Ferrigno:

Optical Side Channel Method

M. Dichtl:

FPGA Implementations of Physical Random Number Generators Using Logic Gates Only

G. Di Natale:

An Integrated Validation Environment for Differential Power Analysis

S. Drimer:

Securing FPGA Designs in Operation and Distribution -- A Survey

R. Elbaz, D. Champagne:

An Overview of Cryptographic Techniques for Memory Authentication

L. Fesquet, T. Beyrouthy:

A Secure Asynchronous Configurable Cell: An Embedded Programmable Logic for Smartcards

V. Fischer, F. Bernard, A. Aubert:

Embedded Testing of the Source of Randomness in FPGAs

K. Gaj, R. Sumner, M. Huang:

Implementation and Comparative Analysis of Selected Modern Hardware Architectures for Montgomery Multiplication

T. Gendrullis, M. Novotny, A. Rupp:

A Real-World Attack Breaking A5/1 within Hours

B. Gierlichs:

Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration

S. S. Kumar:

Physically Unclonable Functions (PUFs) for IP Protection on FPGA

B. Le Gal, L. Bossuet:

CryptArchi Web Site: A Collaborative Web Site for Hardware Security

V. Lomne, R. Soares, T. Ordas, P. Maurine, L. Torres, M. Robert:

Prototyping STTL Robustness Against DPA and DEMA on FPGA: Proof of Concept

S. Madduri, R. Vadlamani, W. Burleson, R. Tessier:

MNOC: A Network on Chip for Monitors

C. Marsh:

Identifying the IP in an FPGA

M. Novotny, A. Rupp:

Realtime A5/1 Attacks with Precomputed Tables

N. Pelloquin:

Quantum Key Distribution : A Key to Security

B. Robisson, A. Tria, P. Manet, A.-L. Ribotta:

Mutualized Security Caracterization Platform for Teaching, Research and Development

W. Schindler:

Security Evaluation of Physical Random Number Generators

A. Tisserand:

The PACE Library and Hardware Arithmetic Operators

B. Valtchanov, V. Fischer, A. Aubert, F. Bernard, N. Bochard:

Modeling and Securing RO-based TRNGs in FPGAs

M. Varchola, M. Drutarovsky, V. Fischer:

Evaluation of Various TRNG Principles Implemented in Actel Fusion Flash FPGA

R. Vaslin, G. Goniat, J.-P. Diguet, R. Tessier, D. Unnikrishnan:

Memory Security Management for FPGA-based Embedded Systems

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