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| Talks about Secured Hardware Implementations |
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| B. Badrignans:
Bistream management in FPGA based secure applications |
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| J. Bucek, R. Lorencz: Comparing Left-shift and Montgomery inverse implementations in ASIC |
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| M. Drutarovsky, V. Fischer, G. Lubos, N. Bochard:
Compact AES S-Boxes Initialization in Low Power Non-Volatile FPGAs |
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| K. Gaj, V. Amirineni, E. Homsirikamol, M. Rogawski, R. Velegalati, M. Varchola: Fair Comparison of Hardware Implementations of Cryptography without Revealing the Source Codes |
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| M. Rogawski, X. Xin, E. Homsirikamol, D. Hwang, K. Gaj: Implementing SHA1 and SHA2 Standards on the Eve of SHA3 Competition |
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| Talks about Side Channel Attacks |
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| T. Beyrouthy, L. Fesquet:
DPA robust S-BOX implementation on a secure asynchronous FPGA |
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| L. Bossuet, N. Kamoun, A. Gazel:
A very low cost DPA countermeasures to secure hardware AES cipher |
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| J-L. Danger:
Evaluation of Countermeasures Implementation Based on Boolean Masking to Thwart Side Channel Attacks |
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| J. Di-Battista, J.-Ch. Courrege, P. Perdu, B. Rouzeyre, L. Torres:
Light emission analysis on FPGA: a new side channel possibility |
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| S. Guilley:
Mid-term review of the DPA contest |
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| W. Schindler:
The Stochastic Approach in Power Analysis - A Synthesis between Engineer's Expertise and Advanced Stochastics |
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| A. Tisserand:
Redundant Number Systems for Reconfigurable Arithmetic Units |
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| Talks about Random Number Generators |
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| F. Bernard, V. Fischer:
Coherent sampling based TRNG : a statistical and behavioral approach |
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| R. Newell:
Conditioner and Health Monitor for Use in Conjunction with a Random Bit Generator |
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| V. Rozic: Random Numbers Generation: Investigation of Physical Effects on FPGA |
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| R. Santoro: Evaluation of TRNGs under Various Experimental Conditions |
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| B. Valtchanov, V. Fischer, A. Aubert:
TRNG based on the coherent sampling |
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| M. Varchola, M. Drutarovsky:
New FPGA based TRNG Principle Using Transition Effect with Built-In Malfunction Detection |
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